Verification techniques for system-level design (Record no. 359491)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00602pam a2200169a 44500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 160408b2008 xxu||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780123706164 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815 |
| Item number | F955v |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Fujita, Masahiro, Ghosh, Indradeep |
| 245 1# - TITLE STATEMENT | |
| Title | Verification techniques for system-level design |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Amsterdam |
| Name of publisher, distributor, etc. | Elsevier |
| Date of publication, distribution, etc. | 2008 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | viii, 240p. |
| 440 ## - SERIES STATEMENT/ADDED ENTRY--TITLE | |
| Title | The Morgan Kaufmann Series In Systems On Silicon |
| Volume/sequential designation | |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | System On A Chip -- Testing. 2.Integrated Circuits -- Verification. 3.Formal Method (Computer Science) |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Prasad, Mukul |
| 997 ## - | |
| -- | A160090 C |
| Withdrawn status | Lost status | Damaged status | Not for loan | Collection code | Home library | Current library | Date acquired | Total Checkouts | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| General Stacks | PK Kelkar Library, IIT Kanpur | PK Kelkar Library, IIT Kanpur | 15/02/2008 | 621.3815 F955v | A160090 | 08/04/2016 | 08/04/2016 | Books |