Design of CMOS phase-locked loops (Record no. 565336)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01785 a2200205 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | OSt |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9781108494540 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | IIT Kanpur |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | eng |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.3815364 |
| Item number | R219d |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Razavi, Behzad |
| 245 ## - TITLE STATEMENT | |
| Title | Design of CMOS phase-locked loops |
| Remainder of title | from circuit level to architecture level |
| Statement of responsibility, etc | Behzad Razavi |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Name of publisher | Cambridge University Press |
| Year of publication | 2020 |
| Place of publication | Cambridge |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | xvi, 492p |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | Using a modern, pedagogical approach, this textbook gives students and engineers a comprehensive and rigorous knowledge of CMOS phase-locked loop (PLL) design for a wide range of applications. It features intuitive presentation of theoretical concepts, built up gradually from their simplest form to more practical systems; broad coverage of key topics, including oscillators, phase noise, analog PLLs, digital PLLs, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers; tutorial chapters on high-performance oscillator design, covering fundamentals to advanced topologies; and extensive use of circuit simulations to teach design mentality, highlight design flaws, and connect theory with practice. Including over 200 thought-provoking examples highlighting best practices and common pitfalls, 250 end-of-chapter homework problems to test and enhance the readers' understanding, and solutions and lecture slides for instructors, this is the perfect text for senior undergraduate and graduate-level students and professional engineers who want an in-depth understanding of PLL design. |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Phase-locked loops -- Design and construction |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Metal oxide semiconductors, Complementary -- Design and construction |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | Oscillators, Electric -- Design and construction |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books |
| Withdrawn status | Lost status | Damaged status | Not for loan | Collection code | Home library | Current library | Date acquired | Source of acquisition | Cost, normal purchase price | Full call number | Accession Number | Cost, replacement price | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| General Stacks | PK Kelkar Library, IIT Kanpur | PK Kelkar Library, IIT Kanpur | 17/05/2022 | 102 | 4845.42 | 621.3815364 R219d | A185703 | 6922.03 | Books |