VLSI PLACEMENT & GLOBAL ROUTING USING SIMULATED ANNEALING
Material type:
- 0898382815
- 621.395 Se23v
Item type | Current library | Collection | Call number | Status | Date due | Barcode | Item holds | |
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PK Kelkar Library, IIT Kanpur | General Stacks | 621.395 Se23v (Browse shelf(Opens below)) | Available | A110623 |
Total holds: 0
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621.395 R812L LOW POWER CMOS VLSI CIRCUIT DESIGN | 621.395 SA28V VLSI PHYSICAL DESIGN AUTOMATION | 621.395 SA75I AN INTRODUCTION TO VLSI PHYSICAL DESIGN | 621.395 Se23v VLSI PLACEMENT & GLOBAL ROUTING USING SIMULATED ANNEALING | 621.395 Si58f FPGA design | 621.395 Sy87 System on chip test architectures | 621.395 T194F FUNDAMENTALS OF MODERN VLSI DEVICES |
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