Welcome to P K Kelkar Library, Online Public Access Catalogue (OPAC)

Amazon cover image
Image from Amazon.com

Computer architecture : a quantitative approach [6th ed.]

By: Contributor(s): Language: English Publication details: Elsevier 2019 AmsterdamEdition: 6th edDescription: xxix, 902pISBN:
  • 9789351073659
Subject(s): DDC classification:
  • 004.22 H392c6
Summary: Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook from Hennessy and Patterson, winners of the 2017 ACM A.M. Turing Award recognizing contributions of lasting and major technical importance to the computing field, is fully revised with the latest developments in processor and system architecture. The text now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC
List(s) this item appears in: New arrival June 13 to 26, 2022
Star ratings
    Average rating: 0.0 (0 votes)
Holdings
Item type Current library Collection Call number Copy number Status Date due Barcode Item holds
Text Books Text Books PK Kelkar Library, IIT Kanpur TEXT 004.22 H392c6 cop.1 (Browse shelf(Opens below)) Copy 1 Available A185807
Text Books Text Books PK Kelkar Library, IIT Kanpur TEXT 004.22 H392c6 cop.2 (Browse shelf(Opens below)) Copy 2 Available A185808
Text Books Text Books PK Kelkar Library, IIT Kanpur TEXT 004.22 H392c6 cop.3 (Browse shelf(Opens below)) Copy 3 Available A185809
Total holds: 0

Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook from Hennessy and Patterson, winners of the 2017 ACM A.M. Turing Award recognizing contributions of lasting and major technical importance to the computing field, is fully revised with the latest developments in processor and system architecture. The text now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC

There are no comments on this title.

to post a comment.

Powered by Koha