TY  - BOOK
AU  - Sutherland,Stuart,Davidmann,Simon
AU  - Flake,Peter
TI  - SYSTEMVERILOG FOR DESIGN
SN  - 0387333991
U1  - 621.392 
PY  - 2006///
CY  - 
PB  - Springer Science+Business Media Inc., New York
KW  - System Verilog
KW  - Hardware Design
KW  - Hardware Modeling
ER  -