TY  - BOOK
AU  - Padmanabhan,T. R.
AU  - Sundari,B. Bala Tripura
TI  - DESIGN THROUGH VERILOG HDL
SN  - 0471441481
U1  - 621.392 
PY  - 2004///
CY  - 
PB  - Institute Of Electrical And Electronics Engineers, Piscataway, Nj.
KW  - Verilog(Computer Hardware Description Language)
ER  -