TY  - BOOK
AU  - 
AU  - Brayton, Robert K.
TI  - Logic minimization algorithms for VLSI synthesis
U1  - 621.38173 
PY  - 1984///
CY  - Boston
PB  - Kluwer Academic Publishers
KW  - Logic design
KW  - Integrated circuits -- Very large scale integration
KW  - Integrated circuits Design and construction -- Data processing
ER  -