| 000 | 00513pam a2200169a 44500 | ||
|---|---|---|---|
| 008 | 160408b2004 xxu||||| |||| 00| 0 eng d | ||
| 020 | _a0471441481 | ||
| 082 |
_a621.392 _bP13D |
||
| 100 | _aPadmanabhan,T. R. | ||
| 245 | 1 | _aDESIGN THROUGH VERILOG HDL | |
| 260 |
_a _bInstitute Of Electrical And Electronics Engineers, Piscataway, Nj. _c2004 |
||
| 300 | _axii,455 | ||
| 650 | _aVerilog(Computer Hardware Description Language) | ||
| 700 | _aSundari,B. Bala Tripura | ||
| 964 | _gCIRC | ||
| 997 | _aA148128 C | ||
| 999 |
_c357743 _d357743 |
||