000 00572pam a2200169a 44500
008 160408b2006 xxu||||| |||| 00| 0 eng d
020 _a9780387244112
040 _aP K Kelkar Library, IIT Kanpur
082 _a621.395
_bB461s
100 _aBertacco, Valeria
245 0 _aScalable hardware verification with symbolic simulation
_cValeria Bertacco
260 _aNew York
_bSpringer
_c2006
300 _axx, 177p
650 _aIntegrated circuits -- Verification -- Simulation methods
650 _aSystem design -- Simulation methods
997 _aA174766 s C
999 _c371645
_d371645